buffered hf, piranha clean, wet bench, isotropic etch semiconductor
Wet Etch Processes are the liquid-chemical-based material removal techniques used throughout semiconductor manufacturing for cleaning, thin film removal, and pattern transfer…
rca clean, wafer cleaning, surface preparation, sc-1, sc-2, piranha clean, marangoni drying, wet etch process, buffered oxide etch, HF etch, wet cleaning selectivity
RCA cleaning and advanced semiconductor surface preparation constitute the sequential wet chemical and physical processes engineered to remove organic residues, sub-micron…
wet etching vs dry etching, isotropic vs anisotropic etch, plasma etch vs wet etch, semiconductor etching explained, difference between wet and dry etch
Etching removes material that lithography has already exposed, and a fab chooses between two fundamentally different ways to do it: wet etch dissolves material with liquid…
wafer fab equipment, wafer fab equipment spending, semi capex, fab capital intensity, capex per wafer start
WFE — Wafer Fab Equipment spending — is the single number the entire chip industry uses to measure how much capital is being poured into new manufacturing capacity in a given…
chiplet architecture, chiplet architectures, chiplets, chiplet, 2.5d & 3d packaging, 2.5d and 3d packaging, 3d integration semiconductor, through silicon via tsv, silicon interposer
Chiplets and 2.5D/3D integration are the packaging-level answer to a problem lithography itself can no longer solve alone: building one giant monolithic chip has stopped being…
optical emission spectroscopy etch, endpoint algorithm semiconductor, etch stop detection, plasma etch process control, real time etch monitoring
Endpoint algorithms are the real-time detection systems that tell a plasma etch tool exactly when to stop etching, and getting that timing right is just as critical as every other…
baseband processor explained, baseband vs rf front end, baseband chip meaning, what does baseband processor do
A baseband processor is the digital signal-processing core inside a modem chip that actually handles encoding, decoding, and managing cellular communication — running the complex…
semiconductor design house explained, asic design house meaning, chip design services company, what does a design house do
A chip design house is a company that specializes in designing chips — sometimes its own products, sometimes custom designs for other companies — without manufacturing anything…
chip interconnect explained, ai accelerator interconnect meaning, high speed chip interconnect, what does interconnect mean in chips
A chip interconnect is the high-speed link that connects multiple chips together — for example, linking several AI accelerator chips into one combined system — allowing them…
chiplet explained, chiplet vs monolithic die, chiplet design meaning, what does chiplet mean
A chiplet is a small, specialized piece of silicon designed to be combined with other chiplets inside a single chip package, rather than building one enormous monolithic die that…
chipset explained, motherboard chipset, northbridge southbridge, what does a chipset do
A chipset is the small set of supporting chips on a motherboard that manages traffic between the processor and everything else in the computer — storage, memory, USB ports…
deionized water semiconductor fab, di water purification stages, ultrapure water resistivity, di water quality monitoring, wafer rinse water contamination
A DI tank stores and delivers deionized water — water stripped of nearly all its dissolved ions and minerals — and it exists because ordinary tap water is catastrophically…
oil free vacuum pump semiconductor, dry pump vs oil pump, backing pump explained, rough vacuum pump fab, contamination free vacuum system
A dry pump is the mechanical backing pump that handles the first, coarser stage of vacuum pump-down described in the turbomolecular pump entry, and its defining feature — running…
what is FEM lithography
A focus-exposure matrix, or FEM, is a lithography test wafer deliberately patterned across a systematic grid of different focus and exposure dose settings, used to map out exactly…
foreline piping vacuum pump, foreline heating condensation, turbomolecular pump to dry pump connection, foreline leak detection, exhaust piping fab
A foreline is the section of vacuum piping that runs between a process chamber's turbomolecular pump and the dry pump backing it, and it exists because the two pumps described…
foundry node explained, 5nm vs 3nm meaning, process node marketing, what does nm mean in chips
A foundry node — often written as "5nm" or "3nm" — is the name a foundry gives to one generation of its chip manufacturing process, and despite the number sounding like a precise…
hdl chip design explained, verilog vhdl meaning, hardware description language meaning, what does hdl mean in chip design
A hardware description language, or HDL, is a specialized programming language used to describe the exact structure and behavior of digital circuits, letting chip designers…
lithography scanner explained, chip lithography machine meaning, wafer stepper scanner, what does a lithography scanner do
A lithography scanner is the physical machine that actually performs the lithography process — precisely positioning the wafer, projecting light through the photomask…
modem chip explained, cellular modem meaning, 5g modem chip, what does a modem chip do
A modem chip is the specialized processor inside a phone, laptop, or other connected device that handles the job of translating data into radio signals for transmission…
mpw semiconductor explained, multi project wafer meaning, shared wafer run chip prototyping, what does mpw mean
A multi-project wafer, or MPW, is a single wafer run shared by several different chip designs from different customers, splitting the fixed cost of a fabrication run across…
A network on chip, or NoC, is a communication system built directly into a chip that routes data between its many internal components — cores, memory, and other blocks — using…
process design kit, pdk explained, process design kit explained, what is a process design kit, pdk semiconductor, foundry pdk
A PDK, or process design kit, is the file package a foundry hands its customers so their chip designs actually work on that foundry's silicon: transistor models, standard-cell…
photomask explained, lithography mask meaning, how does a photomask work, euv photomask
A photomask is a precisely patterned plate — usually a sheet of quartz coated with an opaque chrome pattern — that lithography equipment uses like a stencil to project a chip's…
power management ic explained, pmic chip meaning, what does a pmic do, power management integrated circuit
A power management IC, or PMIC, is a dedicated chip responsible for taking a device's raw input power — such as a battery or wall adapter — and converting, regulating…
rdl chip packaging, rdl explained, what does rdl mean semiconductor, redistribution layer packaging
A redistribution layer, or RDL, is a thin layer of extra wiring built on top of a finished chip that reroutes its native connection points to new, more convenient locations…
wet scrubbing exhaust treatment, scrubber column design, gas absorption liquid treatment, acid gas neutralization fab, counterflow scrubber
A scrubber is the specific abatement technology that removes hazardous gases from process exhaust by passing them through a liquid — usually water, sometimes with added chemicals…
semiconductor explained, semiconductor definition, semiconductor vs conductor vs insulator, what is silicon used for
A semiconductor is a material — most commonly silicon — whose ability to conduct electricity sits between that of a true conductor (like copper) and a true insulator (like glass)…
chip ip core explained, ip licensing semiconductor meaning, what is ip core in chip design, processor ip licensing
A semiconductor IP core is a pre-designed, reusable block of chip circuitry — such as a processor core, a memory controller, or a communications interface — that a chip designer…
gate spacer fabrication, self aligned source drain, anisotropic etch spacer formation, conformal deposition spacer, transistor spacer width
A spacer is a thin sidewall of insulating material formed against the edges of a transistor's gate, and it exists to precisely control where the source and drain regions begin…
soc explained, system on chip meaning, what does soc mean in phones, soc vs cpu
A system on chip, or SoC, is a single chip that combines multiple major components of a computing system — typically a processor, memory controller, graphics, and other…
chip tape out explained, tape out meaning semiconductor, what does tape out mean, chip design tape out
Tape-out is the moment a chip's design is finalized and sent off to a foundry for manufacturing — the point of no return in chip development, after which making changes means…
tsv explained, through silicon via meaning, tsv chip packaging, what does tsv stand for
A through-silicon via, or TSV, is a microscopic vertical electrical connection drilled directly through a piece of silicon, allowing signals to pass straight up and down between…
tensor processing unit explained, tpu vs gpu, tpu meaning ai chip, what does tpu stand for
A TPU, or Tensor Processing Unit, is a type of AI accelerator chip designed specifically to speed up the tensor math — large-scale multi-dimensional array operations — that…
turbo pump semiconductor fab, high vacuum pump explained, staged vacuum pump down, plasma chamber vacuum requirements, molecular flow vacuum pump
A turbomolecular pump is the workhorse vacuum pump that gets a process chamber down to the extremely low pressures nearly every fab process covered in this series actually…
silicon wafer explained, semiconductor wafer meaning, wafer fabrication, what is a die vs wafer
A wafer is a thin, round slice of ultra-pure silicon — typically about 300 millimeters across on modern production lines — that serves as the base material on which an entire…
what is WAT semiconductor
A wafer acceptance test, or WAT, is a standardized set of electrical measurements taken on special test structures scattered across a wafer to confirm the underlying fabrication…
fab exhaust treatment, thermal abatement vs catalytic, hazardous process gas treatment, wet scrubbing vs abatement, greenhouse gas fab exhaust
Abatement is the treatment of a fab's process exhaust before it ever leaves the facility, and it exists because nearly every reactive chemical process covered throughout this…
subtractive interconnect process, aluminum vs copper interconnect, chlorine plasma etch aluminum, metal wiring fabrication, aluminum etch profile
Aluminum metal etch is the process step that patterns aluminum wiring into the precise interconnect shapes a chip design calls for, and it represents an older interconnect…
ai accelerator chip explained, ai accelerator vs gpu, ai accelerator meaning, types of ai accelerators
An AI accelerator is any chip built specifically to speed up the math behind artificial intelligence — mostly large-scale matrix multiplication — rather than to handle…
integrated device manufacturer meaning, idm vs fabless, idm semiconductor company, what does idm mean in chips
An IDM, or Integrated Device Manufacturer, is a chip company that both designs its chips and manufactures them in its own fabrication plants — the opposite of the fabless model…
npu explained, neural processing unit, npu vs gpu vs cpu, on-device ai chip
An NPU, or Neural Processing Unit, is a chip or chip block built specifically to run the repetitive math behind neural networks — mostly large batches of matrix multiplication…
osat semiconductor meaning, outsourced assembly and test explained, osat vs foundry, chip packaging and testing company
An OSAT — short for Outsourced Semiconductor Assembly and Test — is a company that specializes in packaging finished silicon dies and testing completed chips, handling…
Atomic layer deposition, or ALD, is a thin-film deposition technique that builds up material one atomic layer at a time through a sequence of self-limiting chemical reactions…
Chemical vapor deposition, or CVD, is a thin-film deposition technique where gaseous chemical precursors react at a wafer's surface to form a solid material layer, offering faster…
chip packaging explained, semiconductor packaging meaning, advanced packaging chiplets, what is a chip package
Chip packaging is the process of taking a finished, tested silicon die and encasing it in a protective housing with external connectors — the familiar black rectangle with metal…
chemical mechanical polishing explained, planarization semiconductor, cmp dishing erosion, copper damascene cmp, preston equation polishing
Chemical-Mechanical Polishing (CMP) is what flattens the wafer back out after deposition and etch leave it bumpy. Every layer built through the CVD-lithography-etch loop leaves…
compute in memory explained, in memory computing ai, compute in memory chip meaning, what does compute in memory mean
Compute-in-memory is a chip architecture approach that performs certain calculations directly inside memory itself, rather than following the traditional design of moving data out…
damascene process explained, dual damascene semiconductor, copper electroplating BEOL, barrier metal liner copper, low-k dielectric interconnect
Copper interconnect is the wiring that connects millions or billions of individual transistors into an actual working circuit. Once the transistors themselves are built through…
critical dimension explained, cd semiconductor meaning, critical dimension lithography, what does cd mean in chip manufacturing
Critical dimension, often abbreviated CD, refers to the smallest, most precisely controlled feature size on a chip — typically the width of the narrowest transistor gate or wire…
cryogenic plasma etch explained, high aspect ratio sidewall control, low temperature etch semiconductor, tsv etch profile, gaa release etch sidewall bowing
Cryo etch is plasma etching performed with the wafer cooled to extremely low temperatures, and it exists to solve an etch-profile problem that ordinary room-temperature…