scaled initialization
optimization
Scaled Initialization is a weight initialization strategy that scales initial weights based on network depth — ensuring that the variance of activations and gradients remains…
29,259 technical terms and definitions
optimization
Scaled Initialization is a weight initialization strategy that scales initial weights based on network depth — ensuring that the variance of activations and gradients remains…
theory
Scaling curves is the empirical plots showing how model loss or capability metrics change as compute, parameters, or data scale - they are central tools for forecasting…
model training
The scaling hypothesis proposes that simply increasing model size, training data, and compute leads to emergent capabilities and improved performance in language models, without…
scale, parameters, data, compute, chinchilla, power law, training efficiency
A scaling law is an empirical power-law relationship describing how a transformer foundation model's cross-entropy loss decreases smoothly, deterministically, and predictably as…
chinchilla, compute optimal
Scaling law research measures how a model's loss on held-out data responds to systematically varying model size, dataset size, and compute across many training runs, then fits…
scaling laws, neural scaling law, chinchilla scaling, compute optimal training, power law, parameter data compute scaling, isoflop
Neural scaling laws, culminating in the Chinchilla compute-optimal framing, establish power-law relationships between model loss and the three resources, parameters, data…
chinchilla, compute optimal, data scaling, training efficiency, model size, tokens
Scaling laws for language models describe loss as a smooth, predictable power-law function of the three main resources a training run consumes: model parameter count, training…
model training
Scaling laws research extends beyond simply predicting loss at a given model size to informing compute-optimal training decisions: given a fixed compute budget, what combination…
compute-optimal training, chinchilla scaling, training compute allocation, neural scaling behavior
Scaling law research continues to refine how loss scales with model size, data, and compute, extending beyond the original single-modality language model findings to multimodal…
theory
Scaling laws for in-context learning examine how a language model's ability to learn a new task from examples provided directly within its input prompt, without any weight…
rag
Scaling retrieval systems is the engineering discipline of growing retrieval capacity, corpus size, and query complexity without major quality or latency regression - it requires…
etch, scalloping etch, drie scalloping, bosch process scalloping, sidewall scalloping
Scalloping, specifically designated as Bosch DRIE sidewall ripple distortion, is the characteristic periodic crest-and-trough micro-undercut profile generated along deep silicon…
scan, evaluation
SCAN (Simplified Compositional Generalization) is the sequence-to-sequence compositional generalization benchmark that translates natural language navigation commands into action…
chain, insertion, DFT, design, testability, scan chain
A scan chain, at its simplest, is a shift register built out of a chip's own flip-flops, each reconfigured with a test-mode multiplexer so it can either hold its normal functional…
parallel scan, prefix sum algorithm, blelloch scan, work efficient scan
Parallel Scan (Prefix Sum) Algorithms are the fundamental parallel computation patterns that compute all prefix reductions of an array — where output[i] = op(input[0], input[1]…
design
A scan chain is a fundamental Design for Test (DFT) structure where internal flip-flops (registers) in a digital IC are linked together into a long serial shift register. This…
advanced test & probe
A scan chain reconfigures a chip's flip-flops into one long shift register during test mode, letting an external tester or on-chip controller shift an arbitrary test pattern…
design for testability scan, stuck at fault test, automatic test pattern, scan compression
Scan chain and ATPG co-design means the scan architecture — chain count, length, and compression ratio — is chosen with the target fault models and coverage goals in mind, not…
scan test, scan insertion, dft basics, atpg compression
Scan chain basics: a scan chain is formed by replacing ordinary flip-flops with scan flip-flops and connecting them into a shift register for test purposes. Each scan flip-flop…
scan chain defect detection prediction, scan chain defect, chain defect detection, defect detection prediction, scan chain, chain defect, defect detection, detection prediction
Scan Chain Defect Detection Prediction with Machine Learning Introduction & Motivation Scan Chain Defect Detection Prediction with Machine Learning addresses a central problem…
scan chain defect localization prediction, scan chain defect, chain defect localization, defect localization prediction, scan chain, chain defect, defect localization
Scan Chain Defect Localization Prediction with Machine Learning Introduction & Motivation Scan Chain Defect Localization Prediction with Machine Learning addresses a central…
scan architecture, DFT scan, test compression, ATPG scan
Scan chain design involves balancing chain length, minimizing physical routing distance between consecutively connected flip-flops, and respecting clock-domain and power-domain…
dft scan, test compression, scan architecture
Scan chain insertion and scan compression are typically run as a combined step in the physical design flow, since the choice of how many physical scan chains to create interacts…
design & verification, dft, scan insertion, atpg, mux-d
Scan chain stitching is the physical-design step that connects a chip's individual scan flip-flops into ordered shift-register chains, choosing which flip-flop feeds into which…
scan chain test coverage prediction machine learning, scan chain, test coverage prediction, ate atpg, scan chain test coverage prediction, scan chain test, chain test coverage
Scan Chain Test Coverage Prediction with Machine Learning Introduction & Motivation Scan Chain Test Coverage Prediction with Machine Learning addresses a central problem in scan…
scan chain toggle rate and power dissipation during test, scan chain toggle, chain toggle rate, toggle rate power, rate power dissipation, power dissipation during, scan chain
Scan Chain Toggle Rate and Power Dissipation During Test Introduction & Motivation Scan Chain Toggle Rate and Power Dissipation During Test addresses a central problem in test…
advanced test & probe
Scan compression is a technique that reduces scan test data volume by compressing stimulus and responses - Decompressors expand tester patterns on-chip and compactors fold…
design & verification
Scan Compression is test-data reduction using on-chip decompression and compaction to cut tester bandwidth and test time - It is a core technique in advanced digital…
embedded deterministic test, scan channel compression, atpg compression architecture, test data reduction
Embedded deterministic test (EDT) is a scan compression technique that multiplies the number of internal scan chains a chip can have far beyond the number of physical test pins…
scan compression ratio drift prediction, scan compression ratio, compression ratio drift, ratio drift prediction, scan compression, compression ratio, ratio drift, drift prediction
Scan Compression Ratio Drift Prediction with Machine Learning Introduction & Motivation Scan Compression Ratio Drift Prediction with Machine Learning addresses a central problem…
embedded deterministic test edt, test data volume reduction, decompressor compressor, scan test bandwidth
Scan Compression and Test Data Volume Reduction is the DFT methodology that uses on-chip decompressor and compressor hardware to dramatically reduce the amount of test data that…
design & verification
Scan-based DFT is the combination of scan chain insertion and automatic test pattern generation (ATPG) that forms the backbone of modern digital manufacturing test. Scan insertion…
advanced test & probe
Scan insertion is the design-for-test process that converts selected registers into scan-capable elements - Automation tools replace standard flops with scan cells and connect…
scan path timing violation prediction, scan path timing, path timing violation, timing violation prediction, scan path, path timing, timing violation, violation prediction
Scan Path Timing Violation Prediction with Machine Learning Introduction & Motivation Scan Path Timing Violation Prediction with Machine Learning addresses a central problem…
scan chain, jtag test, boundary scan, dft scan
Scan test architecture describes how a chip's individual scan chains are organized, accessed, and connected to the outside world — including how many parallel chains exist, how…
scan chain, ATPG, stuck at fault test, transition fault test, scan compression
The scan-ATPG test flow runs end to end as: insert scan chains during physical design, run ATPG software to derive patterns against the resulting scan-accessible structure…
scan test pattern fault coverage prediction, scan test pattern, test pattern fault, pattern fault coverage, fault coverage prediction, scan test, test pattern
Scan Test Pattern Fault Coverage Prediction with Machine Learning Introduction & Motivation Scan Test Pattern Fault Coverage Prediction with Machine Learning addresses a central…
google, efficient
ScaNN: Google's Efficient Vector Search Overview ScaNN (Scalable Nearest Neighbors) is a vector similarity search library open-sourced by Google Research. It powers search inside…
rag
ScaNN is the Google-developed approximate nearest-neighbor library optimized for efficient vector search using quantization and partitioning techniques - it targets strong…
lithography
A Scanner is a lithography tool that exposes wafers by synchronously scanning the reticle and wafer stage in opposite directions through a narrow illumination slit — projecting…
scanner dose mapping non uniformity prediction with machine learning, scanner dose mapping non uniformity prediction machine learning, scanner dose, cd, dose mapping
Scanner Dose Mapping Non-Uniformity Prediction with Machine Learning Introduction & Motivation Scanner Dose Mapping Non-Uniformity Prediction with Machine Learning addresses…
litho dose control, illumination uniformity correction scanner, cd uniformity dose
Scanner Dose Uniformity A lithography scanner doesn't expose a whole wafer in one flash — it steps the wafer under a narrow illumination slit and scans the slit across each field…
lithography
Scanner Matching ensures multiple lithography scanners produce consistent overlay and CD performance — characterizing and correcting individual scanner signatures to minimize…
scanner wafer exchange time prediction machine learning, scanner wafer, exchange time prediction, scanner wafer exchange time prediction, scanner wafer exchange, wafer exchange
Scanner Wafer Exchange Time Prediction with Machine Learning Introduction & Motivation Scanner Wafer Exchange Time Prediction with Machine Learning addresses a central problem…
scanning acoustic microscopy, sam, failure analysis
Scanning acoustic microscopy (SAM) is a non-destructive failure-analysis method that uses focused ultrasound to reveal internal defects in packaged parts and assembled structures.…
scanning capacitance microscopy dopant profile prediction, scanning capacitance microscopy, capacitance microscopy dopant, microscopy dopant profile
Scanning Capacitance Microscopy Dopant Profile Prediction with Machine Learning Introduction & Motivation Scanning Capacitance Microscopy Dopant Profile Prediction with Machine…
SCM, dopant profiling, AFM, capacitance voltage, junction depth, SIMS, atom probe tomography
Scanning Capacitance Microscopy Dopant Profiling Scanning capacitance microscopy maps dopant type and concentration across a device cross-section by measuring something neither…
scanning electron microscope, sem, metrology
Scanning Electron Microscope (SEM) is the most widely used high-resolution imaging tool in semiconductor manufacturing — scanning a focused electron beam across a surface…
critical dimension CD measurement, secondary electron imaging, electron beam metrology, SEM defect detection, beam spot size focus, backscattered electron analysis, high resolution nanostructure imaging
Scanning electron microscopy forms an image by rastering a focused electron beam across a sample surface and detecting the electrons that the beam-sample interaction produces…
scanning electron microscopy defect morphology, scanning electron microscopy, electron microscopy defect, microscopy defect morphology, scanning electron, electron microscopy
Scanning Electron Microscopy Defect Morphology with Machine Learning Introduction & Motivation Scanning Electron Microscopy Defect Morphology with Machine Learning addresses…