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Glossary

29,259 technical terms and definitions

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ripple voltage

voltage ripple, output ripple, switching ripple, power supply noise, decoupling

Ripple Voltage in Power Delivery Ripple voltage is the AC component of a regulated power supply output — the oscillation around the nominal DC level that arises from imperfect…

RISC

reduced instruction set computer, load-store architecture, pipelining, MIPS SPARC ARM, CISC vs RISC

RISC, reduced instruction set computer, is a processor design philosophy that favors a small set of simple, fast, uniform instructions over a large set of complex ones, on…

risc-v-atomics-encoding-efficiency machine learning

risc-v atomic operations encoding and semantics, risc-v atomic operations, atomic operations encoding, operations encoding semantics, risc-v atomic, atomic operations

RISC-V Atomic Operations Encoding and Semantics Introduction & Motivation RISC-V Atomic Operations Encoding and Semantics addresses a central problem in isa process control…

risc-v-bitmanip-performance-gain machine learning

risc-v bitmanipulation extension performance gain, risc-v bitmanipulation extension, bitmanipulation extension performance, extension performance gain, risc-v bitmanipulation

RISC-V Bitmanipulation Extension Performance Gain Introduction & Motivation RISC-V Bitmanipulation Extension Performance Gain addresses a central problem in isa process control…

risc-v-compressed-instruction-adoption machine learning

risc-v compressed instruction adoption and efficiency, risc-v compressed instruction, compressed instruction adoption, instruction adoption efficiency, risc-v compressed

RISC-V Compressed Instruction Adoption and Efficiency Introduction & Motivation RISC-V Compressed Instruction Adoption and Efficiency addresses a central problem in isa process…

risc-v-custom-instruction-integration machine learning

risc-v custom instruction integration and encoding space, risc-v custom instruction, custom instruction integration, instruction integration encoding, integration encoding space

RISC-V Custom Instruction Integration and Encoding Space Introduction & Motivation RISC-V Custom Instruction Integration and Encoding Space addresses a central problem in isa…

risc-v-extension-modularity machine learning

risc-v extension modularity and hardware complexity, risc-v extension modularity, extension modularity hardware, modularity hardware complexity, risc-v extension, extension modularity

RISC-V Extension Modularity and Hardware Complexity Introduction & Motivation RISC-V Extension Modularity and Hardware Complexity addresses a central problem in isa process…

risc-v-floating-point-performance machine learning

risc-v floating-point extension performance characteristics, risc-v floating-point extension, floating-point extension performance, extension performance characteristics

RISC-V Floating-Point Extension Performance Characteristics Introduction & Motivation RISC-V Floating-Point Extension Performance Characteristics addresses a central problem…

risc-v-hypervisor-extension-overhead machine learning

risc-v hypervisor extension and virtualization overhead, risc-v hypervisor extension, hypervisor extension virtualization, extension virtualization overhead, risc-v hypervisor

RISC-V Hypervisor Extension and Virtualization Overhead Introduction & Motivation RISC-V Hypervisor Extension and Virtualization Overhead addresses a central problem…

risc-v-privilege-levels-security machine learning

risc-v privilege levels and security isolation, risc-v privilege levels, privilege levels security, levels security isolation, risc-v privilege, privilege levels, levels security

RISC-V Privilege Levels and Security Isolation Introduction & Motivation RISC-V Privilege Levels and Security Isolation addresses a central problem in security process control…

risc-v

risc v, open source instruction set, risc-v processor design, risc-v isa extension

RISC-V is an open instruction-set architecture that defines the software-visible contract between programs and processors while allowing many independent implementations.…

risc v processor core implementation

risc v pipeline design, risc v csr register, risc v vector extension rvv, risc v core tape out

RISC-V Processor Core Implementation: Modular ISA with Pipelined Execution — open-source instruction set enabling specialized processor designs from micro-controllers…

pipeline processor

risc-v processor design, risc-v core implementation, risc-v isa extension, risc-v pipeline microarchitecture, open source processor

pipeline processor is a processor microarchitecture that divides instruction execution into stages so several instructions make progress in the same clock period. Instruction…

risc-v-rv32-vs-rv64-tradeoff machine learning

risc-v rv32 vs rv64 trade-offs and performance, risc-v rv32 vs, rv32 vs rv64, vs rv64 trade-offs, rv64 trade-offs performance, risc-v rv32, rv32 vs, vs rv64, rv64 trade-offs

RISC-V RV32 vs RV64 Trade-Offs and Performance Introduction & Motivation RISC-V RV32 vs RV64 Trade-Offs and Performance addresses a central problem in isa process control…

risc-v-vector-scalability machine learning

risc-v vector extension scalability and implementation, risc-v vector extension, vector extension scalability, extension scalability implementation, risc-v vector, vector extension

RISC-V Vector Extension Scalability and Implementation Introduction & Motivation RISC-V Vector Extension Scalability and Implementation addresses a central problem in isa process…

risk-adjusted control charts

spc

Risk-adjusted control charts is the SPC method that adjusts expected performance baselines for varying case mix or process-risk factors - it enables fairer signal interpretation…

risk-analysis-quantum machine learning

risk analysis quantum, risk analysis, analysis quantum

Risk Analysis Quantum Introduction & Motivation Risk Analysis Quantum addresses a central problem in quantum process control and risk-analysis-portfolio-assessment prediction: how…

risk assessment (legal)

risk assessment, legal, legal ai

Legal risk assessment with AI uses machine learning to identify and quantify legal risks in documents and transactions — analyzing contracts, litigation history, regulatory…

risk-sensitive rl

reinforcement learning advanced

Risk-Sensitive RL is reinforcement-learning optimization that accounts for outcome uncertainty and tail-risk exposure. - It prioritizes robust decisions by penalizing…

rl²

rl², meta-learning

RL² (RL-Squared, Learning to Reinforcement Learn) is a meta-RL approach that uses a recurrent neural network to implement a learning algorithm within its activations — the RNN's…

rl-hardware-design-search machine learning

reinforcement learning for automated hardware design space search, reinforcement learning automated, learning automated hardware, automated hardware design, hardware design space

Reinforcement Learning for Automated Hardware Design Space Search Introduction & Motivation Reinforcement Learning for Automated Hardware Design Space Search addresses a central…

rl2

rl2, reinforcement learning advanced

RL2 is meta-reinforcement learning where recurrent policies implicitly learn the update algorithm. - It encodes exploration-exploitation strategy in recurrent hidden states across…

rlaif

rlaif, rlhf

RLAIF (Reinforcement Learning from AI Feedback) is the technique of using AI models (instead of humans) to provide the preference feedback for RLHF — a separate AI model evaluates…

rlaif

rlaif, training techniques

RLAIF is reinforcement learning from AI feedback, where policy updates are guided by model-based preference signals - It is a core method in modern LLM training and safety…

rlgc extraction

rlgc, signal & power integrity

RLGC Extraction is derivation of per-unit-length resistance, inductance, conductance, and capacitance for interconnects - It provides the distributed parameters needed…

rlhf

reinforcement learning human feedback, reward model, ppo alignment

RLHF (Reinforcement Learning from Human Feedback) is a training methodology that aligns LLMs with human preferences by training a reward model on human comparisons and optimizing…

rlhf

reinforcement learning human feedback, dpo, preference optimization, reward model alignment

Reinforcement Learning from Human Feedback (RLHF) is the alignment technique that turned raw language models into usable assistants. A pretrained model is fluent but aimless — it…

rlhf alignment training pipeline

reward preference model optimization, ppo kl constrained tuning, dpo preference optimization llm, rlaif synthetic feedback alignment

RLHF Alignment Training Pipeline is the post-base-model alignment stage that shapes model behavior toward human preferences after large-scale pre-training and supervised…

rma (return material authorization)

rma, return material authorization, quality

RMA (Return Material Authorization) is the formal process used to handle the return of defective or non-conforming semiconductor products from customers back to the manufacturer…

rms current

rms, signal & power integrity

RMS Current is root-mean-square current metric used to estimate time-averaged electromigration stress - It captures effective heating and diffusion-driving stress for varying…

rmsnorm

neural architecture

RMSNorm simplifies layer normalization by normalizing using only the root-mean-square of the activations, without separately centering them by subtracting the mean the way…

rmsnorm in vit

computer vision

RMSNorm is the simplified normalization that divides by the root mean square of activations without centering them, offering a lighter alternative to LayerNorm in Vision…

rmsprop root mean square propagation prediction machine learning

rmsprop root mean square propagation and second moment estimation, rmsprop root mean, root mean square, mean square propagation, square propagation second, rmsprop root

RMSProp Root Mean Square Propagation and Second Moment Estimation Introduction & Motivation RMSProp Root Mean Square Propagation and Second Moment Estimation addresses a central…

rmtpp

rmtpp, time series models

RMTPP is a recurrent marked temporal point-process model for jointly predicting event type and occurrence time - Recurrent sequence states produce conditional intensity parameters…

rna-computing-systems machine learning

rna computing systems, rna computing, computing systems

RNA Computing Systems Introduction & Motivation RNA Computing Systems addresses a central problem in rna-computing process control and rna-computation-speed prediction: how…

rna design

healthcare ai

AI for clinical trials uses machine learning to optimize trial design, patient recruitment, and outcome prediction — identifying eligible patients, predicting enrollment…

rnd

rnd, reinforcement learning advanced

RND is an exploration method that uses prediction error to a fixed random target network as novelty signal - A predictor network learns to match random features, and high error…

rnn

recurrent neural network, recurrent network, recurrent networks, recurrence, hidden state, rnn basics, backpropagation through time

A recurrent neural network (RNN) is the architecture built for sequences — text, audio, sensor streams, anything where order matters — and it handles sequence the simplest way…

rnn-t

rnn-t, audio & speech

RNN-T is a streaming automatic-speech-recognition architecture that predicts output tokens from acoustic and label histories - An encoder processes acoustic frames while…

rnn-t streaming

rnn-t, audio & speech

RNN-T Streaming is streaming ASR based on recurrent neural network transducer architectures - It supports low-latency transcription by incrementally emitting tokens as audio…

roadmap

learning path, study plan

AI/ML Learning Roadmap Phase 1: Foundations (Weeks 1-4) Programming Fundamentals Python basics: Variables, functions, classes, file I/O Data structures: Lists, dicts, sets…

roadmap

planning, prioritize

Roadmap AI product roadmap planning balances quick wins that demonstrate value with long-term capability building, prioritizing features by impact and feasibility while…

Robert Noyce

Fairchild Semiconductor, planar integrated circuit, Intel co-founder, Mayor of Silicon Valley, Noyce patent 1959, monolithic integrated circuit

Robert Noyce (1927–1990) was an American physicist and engineer who co-founded Fairchild Semiconductor in 1957 and Intel in 1968, and who devised the monolithic silicon integrated…

roberta

foundation model

RoBERTa is a robustly optimized BERT that improved pre-training to achieve better performance without architecture changes. Key improvements over BERT: Longer training: 10x more…

roberta robust bert training prediction machine learning

roberta robust bert training and hyperparameter optimization, roberta robust bert, robust bert training, bert training hyperparameter, training hyperparameter optimization

RoBERTa Robust BERT Training and Hyperparameter Optimization Introduction & Motivation RoBERTa Robust BERT Training and Hyperparameter Optimization addresses a central problem…

roberta - robust pretrained approach

roberta robust pretrained approach, roberta robust, robust pretrained, bert glue mask mlm nlp nsp, roberta robust pretrained, robust pretrained approach, pretrained approach

RoBERTa - Robust Pretrained Approach Introduction & Motivation RoBERTa: improved BERT pre-training via training procedure refinement. Better hyperparameters and data.…