spacer etch process flow

# Spacer Etch Process Flow

Spacer Etch Process Flow describes the sequence connecting pattern preparation, removal and verification.

## Follow the transitions

Each box marks a manufacturing purpose, not an executable recipe. Some integrations combine steps or move strip and clean operations. Endpoint, where used, must be qualified against feature clearing and underlayer loss.

## Integration context

A conformal nitride film over an oxide liner is directionally etched back to leave sidewall spacers. The stack is conformal around topography, not a simple flat blanket stack. The basic self-aligned etchback typically needs no new PR pattern; block masks can exist in more complex integrations.

## What to verify

Check spacer width, horizontal clearing, liner loss and silicon recess.

The illustrated sequence omits tool settings and integration-specific auxiliary steps. For AlCu, corrosion-control treatment must be coordinated with resist removal and atmospheric exposure. For gate and spacer modules, preserving a thin dielectric or exposed silicon is part of the clearing window, not an afterthought.

## Related terminology

spacer etch process flow, spacer etch. Short abbreviations are local process vocabulary and can have other meanings; use the full module name when searching.

## Source and scope

[Selective nitride spacer etching](https://plasma.oxinst.com/assets/uploads/documents/3182_PT_Process_News_Mar2015_Low_res_Spreads.pdf). The diagram is an original teaching schematic. Layer choices and process families describe an example rather than a universal manufacturing recipe.