IR Drop

IR drop analysis for a chip's power delivery network has to account for voltage droop contributions from every stage of the power path, the package and board-level power delivery feeding the chip, decoupling capacitance at multiple levels (package, on-die, through-silicon capacitors), and the on-chip power grid itself, since a voltage droop problem can originate at any one of these stages or from their combined interaction. Treating IR drop purely as an on-chip phenomenon, without accounting for package and board-level power delivery behavior, risks missing voltage droop contributions that originate outside the chip itself but still affect the voltage transistors actually receive.