45nm-process

The 45 nm generation is closely associated with Intel’s adoption of high-k and metal-gate transistors. Intel publicly described the materials change in January 2007. The high-k dielectric and metal electrode addressed different weaknesses of the older silicon-dioxide and polysilicon stack. Their coordinated integration was the advance, rather than substituting one material in isolation.

A high-k dielectric provides strong gate coupling at a greater physical thickness. For an ideal dielectric, capacitance per area is proportional to permittivity divided by thickness. Higher permittivity therefore permits a physically thicker layer for a chosen capacitance target. The real stack also contains interfaces and other layers, so equivalent oxide thickness and physical thickness require separate specifications.

A metal electrode avoids polysilicon depletion and helps set the gate’s electrical behavior. The work function and its interaction with the dielectric influence threshold voltage. Complementary n-channel and p-channel devices impose different requirements. Process temperature, defects, and reliability determine whether the intended gate-stack properties survive manufacturing.

Intel’s published 45 nm technology also demonstrates that node and exposure wavelength differ. Its IEDM paper title explicitly identifies 193 nm dry patterning, strained silicon, and nine copper wiring layers. The lithographic process uses optical imaging and pattern techniques to create features smaller than the free-space wavelength. A 45 nm node label therefore does not imply a 45 nm light source.

The node name alone cannot establish another manufacturer’s integration scheme. Gate-first and replacement-gate approaches have different process sequences, and substrate choices also vary. Product comparisons need actual process details and measured operating conditions. The 45 nm story illustrates how device materials, lithography, and circuit design jointly extended a manufacturing generation.

Sources and further reading. [Intel high-k and metal-gate announcement, January 2007](https://www.intel.com/pressroom/archive/releases/2007/20070128comp.htm); [Intel gate-stack research and IEDM paper index](https://www.intel.com/pressroom/kits/advancedtech/doodle/ref_HiK-MG/high-k.htm).

Read 45 nm process as a process generation marked by commercially significant high-k and metal-gate integration.